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Scott Miller

Phone: (505) 453-3327
Email

Personal Statement:

I am a graduate with highest honors of the New Mexico Institute of Mining and Technology with a B.S. in Electrical Engineering, a B.S. in Computer Science, and a minor in Mathematics. I have worked interships for General C4 Systems (formerly General Dynamics Decision Systems), Los Alamos National Laboraties, and Hytec, Inc. I also pursued a Master's degree in Computer Science at the New Mexico Institute of Mining and Technology. I have a broad research interest in reconfigurable computing, embedded systems, and information assurance. My experiences include the following:

  • Executable fingerprinting: instead of using hash algorithms and other signatures to detect exact matches among executables, this project uses a "fuzzy" fingerprinting method to detect obfuscated code.

  • Flytrap Intrusion Management System: By extending the concepts of a Honeynet, a dynamically routed system can protect production systems and provide attack attribution.

  • Real-time scheduling to meet secuirty requirements: By using concepts of a real time system, QoS can be provided for both security and user performance.

  • Intel-based instruction pointer protection: This research was aimed at making use of x86 privelege rings to provide hardware-enforced protection of program control flow information. Because of the complexity of the Intel implementation and because virtually no legacy software is designed to use these rings, research is now oriented toward looking for other possible hardware options.

    Papers:

    S. Miller, "Current Streams-C for the EPXA10DB, a Generic Tool for the Development of Complex Control Systems and Signal Processing Systems" in EIC/EMCW 2003 Proceedings, 2003, pp. 519-522.

    This paper presents the porting of the Streams-C language to a new hardware platform, the Altera EPXA10DB. Streams-C is a slight modification of stream that allows designers to denote sections that will be implemented in a programmable logic device and those that will be executed on a standard processor and specify their interconnections.

    S. Miller, G. DuVall, A. Bhatty, J. Edmonds, "Practical Inexpensive, Nanosecond Time-Accuracy Using GPS" in EIC/EMCW 2004 proceedings, 2004.

    This paper explores the practical aspect of my senior design project, the creation of a high accuracy, low-power embedded data acquisition system using a custom printed circuit board for initial data acquisition, an Altera programmable logic device for data-preprocessing, and a standard PC-104 computer for data logging/transmission.

    S. Miller, S. Smith, L. Liebrock, "Analysis of an Extension to Tomasulo's Algorithm to Utilize an Array of Reconfigurable Functional Units" in White Sands Missile Range ITEA 2003 Conference Proceedings, 2003.

    This paper presents the findings of the simulation of a theoretical computer architecture; by a simple run-time analysis of the operations being executed, the processor adds and removes functional units to adapt to processing loads without the need for special compilers or operating system intervention.

    Presentations:

    SFS Presentation: Fly Trap